RGB123 48 output cape pins and settings

[AAH]

I'm testing my HE123 board which is based on the RGB123 48 output cape for the BBB. I'm highly puzzled at the moment (which isn't hard to do). I've based the design on this schematic http://rgb-123.com/wp-content/uploads/2016/03/RGBCape48F.pdf . My problem is that my outputs aren't remotely coming close to matching the ones defined in FPP. I "think" the output definitions used for FPP is in https://github.com/FalconChristmas/fpp/blob/master/src/pru/RGBCape48C.p and these aren't really matching up with what the schematic says which I've extracted below. I've tried both the F16B and 48C settings in the BBB tab and neither gives me an output order that matches the schematic.
Any tips on what I might be doing wrong as I get the output on P8-32 (I think) turning on when P8-8 should be the 1st one.
I'm hoping that there's an easy fix that might be between my keyboard and my seat.

Thanks in advance

Alan

RGB123 #	FPP Output	GPIO	BBB Pin
P0	1	2-3	P8-8
P1	2	2-4	P8-10
P2	3	1-12	P8-12
P3	4	0-26	P8-14
P4	5	1-14	P8-16
P5	6	2-1	P8-16
P6	7	1-29	P8-26
P7	8	2-24	P8-28
P8	9	2-25	P8-30
P9	10	0-11	P8-32
P10	11	2-17	P8-34
P11	12	2-16	P8-36
P12	13	2-15	P8-38
P13	14	2-13	P8-40
P14	15	2-11	P8-42
P15	16	2-9	P8-44
P16	17	2-7	P8-46
P17	18	2-6	P8-45
P18	19	2-8	P8-43
P19	20	2-10	P8-41
P20	21	2-12	P8-39
P21	22	2-14	P8-37
P22	23	0-8	P8-35
P23	24	0-9	P8-33
P24	25	2-2	P8-7
P25	26	2-5	P8-9
P26	27	0-23	P8-13
P27	28	1-15	P8-15
P28	29	0-27	P8-17
P29	30	0-22	P8-19
P30	31	2-23	P8-29
P31	32	0-10	P8-31
P32	33	3-21	P9-25
P33	34	3-19	P9-27
P34	35	3-17	P9-28
P35	36	3-15	P9-29
P36	37	3-16	P9-30
P37	38	3-14	P9-31
P38	39	0-20	P9-41
P39	40	0-7	P9-42
P40	41	0-30	P9-11
P41	42	1-28	P9-12
P42	43	0-31	P9-13
P43	44	1-18	P9-14
P44	45	1-16	P9-15
P45	46	1-19	P9-16
P46	47	1-17	P9-23
P47	48	0-15	P9-24

The below topic is as close as I can get to the outputs listed
http://falconchristmas.com/forum/index.php/topic,5460.msg56299.html#msg56299

[dkulp]

Looking at their code, there seems to be very different pin maps for different versions of their boards:


https://github.com/Yona-Appletree/LEDscape/tree/pru-program-generation/pru/mappings


The pin mapping we have is labelled RGBCape48C whereas the schematics you used is named RGBCape48F.   Thus, you will like need to add a pin setup for the 48F.    My SUGGESTION would be to grab my latest image and my branch and update that.   I've already started pulling the pin mapping into separate header files for the various F##-B controllers:


https://github.com/dkulp/fpp/tree/bbb-jesse/src/pru


I can certainly help.   I'll be in that code at some point this week anyway as I officially add the F8-B/w expansion.  I'm also going to be changing the code so that the ws2811 code runs on PRU1 instead of PRU0 and move the DMX/Pixelnet code to PRU0.   I'm hoping to get the DMX/Pixelnet stuff to do direct r30 bit flipping to avoid having to write out to the GPIO memory addresses.   With both PRU's writing out, there is very minor "jitter" in the gpio out due to delays and memory bottlenecks.   All the DMX/Pixelnet pins (on the F#B's) are directly writable on PRU0 so I'm going to give that a try.

[dkulp]

On more thing I'm going to try doing is putting ifdef's around things that will NOT work on the BBGW.   I don't need to worry about the F4B/F8B/F16B's as the BBGW won't even fit on them (the second USB header is in the way), but the F32B can fit on the BBGW, but if anything trys to write out on one of the pins the wireless card uses, the BBGW will drop the networks and getting it back is HARD (almost a re-install of the image).

[AAH]

Thanks Dan
I hadn't actually came across other versions of the board. It kind of makes sense now now that I see the 48C/48F nomenclature. If I had any idea how to compile things I would create a 48F version to try. I might edit up a copy and get darylc to give me a hand to do what needs to done. It would be nice if a 48F branch could be added to FPP code if possible. I can re-lay out my pcb to suit 48C schematic if necessary and if I can find it. I can pull the info from the FPP github info if I really need to.

Alan

Looking at their code, there seems to be very different pin maps for different versions of their boards:


https://github.com/Yona-Appletree/LEDscape/tree/pru-program-generation/pru/mappings


The pin mapping we have is labelled RGBCape48C whereas the schematics you used is named RGBCape48F.   Thus, you will like need to add a pin setup for the 48F.    My SUGGESTION would be to grab my latest image and my branch and update that.   I've already started pulling the pin mapping into separate header files for the various F##-B controllers:


https://github.com/dkulp/fpp/tree/bbb-jesse/src/pru


I can certainly help.   I'll be in that code at some point this week anyway as I officially add the F8-B/w expansion.  I'm also going to be changing the code so that the ws2811 code runs on PRU1 instead of PRU0 and move the DMX/Pixelnet code to PRU0.   I'm hoping to get the DMX/Pixelnet stuff to do direct r30 bit flipping to avoid having to write out to the GPIO memory addresses.   With both PRU's writing out, there is very minor "jitter" in the gpio out due to delays and memory bottlenecks.   All the DMX/Pixelnet pins (on the F#B's) are directly writable on PRU0 so I'm going to give that a try.

[dkulp]

Thanks Dan
I hadn't actually came across other versions of the board. It kind of makes sense now now that I see the 48C/48F nomenclature. If I had any idea how to compile things I would create a 48F version to try. I might edit up a copy and get darylc to give me a hand to do what needs to done. It would be nice if a 48F branch could be added to FPP code if possible. I can re-lay out my pcb to suit 48C schematic if necessary and if I can find it. I can pull the info from the FPP github info if I really need to.

If you are going to re-layout the board, I'd just go with the F16-B/F32-B schematics.   We know those work well. 


I have the KiCad files for the F32-B in my dropbox:


https://www.dropbox.com/sh/3oyqqmfxfmvts9c/AAAUzvpOdwqZ5AiyvOz3zJmxa?dl=0




That said, I can do the "setup" part for the 48F on my branch later today.   After that, all you would need to do is edit the 48F.hp file to enter the gpio/pin combos and then run "make release" from /opt/fpp/src/pru and restart FPP to test.


Dan

[dkulp]

To make things even more confusing, there is a separate mapping at the top of BBB48String.cpp:


https://github.com/FalconChristmas/fpp/blob/master/src/channeloutput/BBB48String.cpp


that does more mapping of strings for the RGBCape48C.    I wonder if that map is from "C" to "A" and the PRU code is based on A.  No idea.   For "F", I would just do it all in the PRU as that's simple.   


In any case, I've just pushed to my branch some initial setup for the RGBCape48F.   I used the GPIO maps from your table in the first post so it MIGHT work.   It would be great if you could verify.   You would need to start from my latest image, see:


http://falconchristmas.com/forum/index.php/topic,7354.0.html


and then do the manual update to force to the latest.  From there, it should work, I hope.

[AAH]

I will give that a go thanks Dan. It might not be today as I have a heap on.

[dkulp]

One note:  your outputs 38 and 29 in your table need to use the gpio3 variants.   3-20 and 3-18.   It's the same physical pin, but it's named a bit differently in the BBB utilities.  (config-pin names the P9-91 and P9-92)  I didn't catch that yesterday.  I'll update the code and rebuild.   


The main reason is the DMX/PixelNet code needs to either have everything on one GPIO (gpio3 in this case) OR everything to be directly PRU0 r30 accessible (mode 5 on those pins).   (I'm working on migrating them to this)    Those modes aren't available if set to the P9-41/42 modes so at boot, I configure 41/42 as input pins and 91/92 as output.   Thus, we have to use the 91/92 gpio's and such. 


Anyway, that doesn't affect your physical board.   The wiring is that same.   Just some setup in the software.   HOWEVER, it does bring up an interesting note:  Outputs 32-39 correspond to the same pins as the serial outputs on the F##-B boards.   Thus, they COULD be configured to output DMX instead of pixels fairly easily.   Not sure if your board would allow that.

[AAH]

J have debated about adding dmx to the board but decided to stick to pixel only.

[Jim6600]

Alan,

I was confused like you before for the mapping of RGB123 cape. After a hardware test, the actual mapping is like the following. The first column represents the actual output of BBB pins. I even made a PCB borad for it and tested OK recently.


Mapped
--------   
P8   P0   1   2-3   P8-8
P7   P1   2   2-4   P8-10
P6   P2   3   1-12   P8-12
P5   P3   4   0-26   P8-14
P4   P4   5   1-14   P8-16
P3   P5   6   2-1   P8-16
   P6   7   1-29   P8-26
   P7   8   2-24   P8-28
P2   P8   9   2-25   P8-30
P1   P9   10   0-11   P8-32
P16   P10   11   2-17   P8-34
P15   P11   12   2-16   P8-36
P14   P12   13   2-15   P8-38
P13   P13   14   2-13   P8-40
P12   P14   15   2-11   P8-42
P11   P15   16   2-9   P8-44
P10   P16   17   2-7   P8-46
P9   P17   18   2-6   P8-45
P24   P18   19   2-8   P8-43
P23   P19   20   2-10   P8-41
P22   P20   21   2-12   P8-39
P21   P21   22   2-14   P8-37
P20   P22   23   0-8   P8-35
P19   P23   24   0-9   P8-33
P25   P24   25   2-2   P8-7
P26   P25   26   2-5   P8-9
P27         1-13   P8-11
P28   P26   27   0-23   P8-13
P29   P27   28   1-15   P8-15
P30   P28   29   0-27   P8-17
P31   P29   30   0-22   P8-19
P32         2-22   P8-27
P17   P30   31   2-23   P8-29
P18   P31   32   0-10   P8-31
P47         0-3   P9-21
P48         0-2   P9-22
   P32   33   3-21   P9-25
P34         0-14   P9-26
   P33   34   3-19   P9-27
P35   P34   35   3-17   P9-28
P36   P35   36   3-15   P9-29
P37   P36   37   3-16   P9-30
P38   P37   38   3-14   P9-31
P39   P38   39   0-20   P9-41
P40   P39   40   0-7   P9-42
P41   P40   41   0-30   P9-11
P42   P41   42   1-28   P9-12
P43   P42   43   0-31   P9-13
P44   P43   44   1-18   P9-14
P45   P44   45   1-16   P9-15
P46   P45   46   1-19   P9-16
P33   P46   47   1-17   P9-23


Jim